We are often asked how we have achieved this level of miniaturization. It is the result of over ten years of research. In short, we have made significant breakthroughs in three areas.

1. Thin film instead of bond wires

Instead of relying on bond wires to make electrical connections, we have developed high density, fine pitch interconnects using thin film deposition.

The advantages are many: faster transfer of information, less crosstalk, better heat conduction and simplified manufacturing. Due to the efficient dissipation of heat, fans are often made unnecessary.

2. Through Silicon Vias (TSV) – holes instead of bond wires

To connect the vertically stacked wafer substrates, we have developed a technique that makes extremely small holes, or vias, through the silicon wafers. This proprietary technique, XiVIA(R), allows for up to 100 vias per mm².

XiVIA(R) is a low-resistive (metallic) via compatible with silicon substrates ranging from thinned 30 µm to 800 µm wafers. The typical resistance of a 180 µm diameter via in a 300 µm substrate is less than 10 mΩ. XiVIA(R) technology enables interposers, stacked memories (MCP), POP, Wireless-SIP, WLP RP-SIP, 3D-System-on-Chip (3D-SOC). XiVIA(R) is extremely robust and has been space qualified: the technology has been implemented in several satellite subsystems and is being used to in the development of the European Space Agency (ESA) motion control chip.

3. Mounting of bare dies

A bare electronic die is in itself very small. It is the die’s individual packaging that increases its typical size. At ÅAC Microtec, we have succeeded – with the help of our thin film technology and under bump metallization processes – in mounting fine pad pitch dies directly on silicon and ceramic substrates. In this way, we are able to manufacture complete systems – containing dies and MEMS sensors – in an extremely small package.

Picture of Actel ProAsic3 A3P 3Mgate bare die.